1. Field of the Invention
The present invention relates to a memory capacity switching method for switching capacities of an accessible memory in a semiconductor device, as well as to a semiconductor device to which the method applies.
2. Description of the Prior Art
Recent years have seen energetic efforts to develop semiconductor devices each having a DRAM, a CPU and logic circuits mounted on a single chip. Such semiconductor devices generally have a fixed DRAM capacity each, while the size of the DRAM needed by users of these semiconductor devices varies depending on the intended application and use conditions. Under the circumstances, semiconductor devices have been developed and fabricated each incorporating a DRAM of a fixed capacity according to different user needs.
In the fabrication of DRAMs, it is customary to form spare memory cells concurrently in the same memory arrangement in preparation for possible memory cell failures in the future. In case of any memory cells subsequently becoming defective, redundant circuits are used to replace the faulty cells with spare memory cells. These cell replacements are intended not to alter the memory size but to keep the memory to its predetermined capacity as much as possible.
Because conventional semiconductor devices have their DRAM capacities fixed, the need for a specific DRAM capacity has been met by developing and fabricating semiconductor devices of that specific DRAM capacity. It takes time to develop such semiconductor devices, and the costs of fabricating the devices are high.